December 7, 2016
FTEEE1635-High-Efficiency-Coupled-Inductor-Based-Step-Down-Converter-IEEE-EEE-Project-2016-2017

FTEEE-1635 High-Efficiency Coupled-Inductor-Based Step-Down Converter – IEEE EEE Project 2016 – 2017

FTEEE-1635 High-Efficiency Coupled-Inductor-Based Step-Down Converter – IEEE EEE Project 2016 – 2017 ABSTRACT: High-efficiency single-input multiple-output (SIMO) step-down converter. The proposed converter can step down the voltage […]
December 7, 2016
FTV1637 The VLSI Architecture of a Highly Efficient De-blocking Filter for HEVC System - IEEE VLSI Project 2016 - 2017

FTV1637 The VLSI Architecture of a Highly Efficient De-blocking Filter for HEVC System – IEEE VLSI Project 2016 – 2017

FTV1637 The VLSI Architecture of a Highly Efficient De-blocking Filter for HEVC System – IEEE  VLSI Project 2016 – 2017 ABSTRACT: The VLSI architecture and hardware […]
December 7, 2016
FTV1636 A New Binary-Halved Clustering Method and ERT Processor for ASSR System - IEEE VLSI Project 2016 - 2017

FTV1636 A New Binary-Halved Clustering Method and ERT Processor for ASSR System – IEEE VLSI Project 2016 – 2017

FTV1636 A New Binary-Halved Clustering Method and ERT Processor for ASSR System – IEEE  VLSI Project 2016 – 2017 ABSTRACT: An automatic speech–speaker recognition (ASSR) system […]
December 7, 2016
FTEEE1634-Isolated-Double-Step-down-DC-DC-Converter-with-Improved-ZVS-Range-and-No-Transformer-Saturation-Problem-IEEE-EEE-Project-2016-2017

FTEEE-1634 Isolated Double Step-down DC-DC Converter with Improved ZVS Range and No Transformer Saturation Problem – IEEE EEE Project 2016 – 2017

FTEEE-1634 Isolated Double Step-down DC-DC Converter with Improved ZVS Range and No Transformer Saturation Problem – IEEE EEE Project 2016 – 2017  ABSTRACT: An isolated double step-down […]
December 7, 2016
FTV1635 A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing - IEEE VLSI Project 2016 - 2017

FTV1635 A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing – IEEE VLSI Project 2016 – 2017

FTV1635 A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing – IEEE  VLSI Project 2016 – 2017 ABSTRACT: Integral histogram image can accelerate the […]